Academic Degree:

• October 2016 - December 2020, Ph.D., Technische Universität Dresden (TUD), Germany and Aalborg University (AAU), Denmark
• October 2009 - October 2010, M.Sc., United International University, Dhaka, Bangladesh
• April 2003 – May 2007, B.Sc., Ahsanullah University of Science and Technology, Dhaka, Bangladesh

Work Experience:

• March 2022 – Current, Postdoc Researcher, LSC/IC/UNICAMP (https://lsc.ic.unicamp.br/people-2/researchers/)
• February 2021 – January 2022, Assistant Professor, Department of Computer Science and Engineering (CSE), Ahsanullah University of Science and Technology
• October 2016 – December 2020, Research Associate, Fakultät Informatik, Technische Universität Dresden (TU Dresden), Germany (https://wwwdb.inf.tu-dresden.de/our-group/team/nusrat-jahan-lisa/)
• October 2011 - September 2016, Assistant Professor, Department of Computer Science and Engineering (CSE), Ahsanullah University of Science and Technology 
• October 2008 - September 2011, Lecturer, Department of Computer Science and Engineering (CSE), Ahsanullah University of Science and Technology 

Publications:

• Nusrat Jahan Lisa, Tuan Duy Anh Nguyen, Dirk Habich, Akash Kumar, Wolfgang Lehner: High-Throughput BitPacking Compression. DSD 2019: 643-646.
• Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Wolfgang Lehner, Tuan Duy Anh Nguyen, Akash Kumar: FPGA vs. SIMD: Comparison for Main Memory-Based Fast Column Scan. DATA (Revised Selected Papers) 2018: 116-140.
• Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Tuan D. A. Nguyen, Akash Kumar, Wolfgang Lehner: Column Scan Optimization by Increasing Intra-Instruction Parallelism. DATA 2018: 344-353.
• Nusrat Jahan Lisa, Annett Ungethüm, Dirk Habich, Wolfgang Lehner, Tuan D. A. Nguyen, Akash Kumar: Column Scan Acceleration in Hybrid CPU-FPGA Systems. ADMS@VLDB 2018: 22-33.
• Nusrat Jahan Lisa and Hafiz Md. Hasan Babu, “Design of a Compact Ternary Parallel Adder/Subtractor Circuit in Quantum Computing”, 2015 IEEE 45th International Symposium on Multiple-Valued Logic (ISMVL), Waterloo, Ontario, Canada, May 18-20, 2015, pp. 36-41.
• Nusrat Jahan Lisa and Hafiz Md. Hasan Babu, “A Compact Representation of a Quantum Controlled Ternary Barrel Shifter”, 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, May 24 - 27, 2015, pp. 2145-2148.
• Nusrat Jahan Lisa and Hafiz Md. Hasan Babu, “Design of a Compact Reversible Carry Look-Ahead Adder Using Dynamic Programming”, 2015 28th International Conference on VLSI Design (VLSID), Bangalore, India, January 3-7, 2015, pp. 238 - 243.
• Nusrat Jahan Lisa and Hafiz Md. Hasan Babu,“A Compact Realization of an n-Bit Quantum Carry Skip Adder Circuit with Optimal Delay”, 2014 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), Leicester, UK, July 14-17, 2014, pp. 270-277.
• Nusrat Jahan Lisa and Hafiz Md. Hasan Babu, “Minimization of a Reversible Quantum 2n-to-n BCD Priority Encoder”, 10th ACM/IEEE International Symposium on Nanoscale Architectures, July 8-10, 2014, Paris, France, pp. 77-82.